? semiconductor components industries, llc, 2002 march, 2002 rev. 7 1 publication order number: mc100lvel92/d mc100lvel92 5vtriple pecl input to lvpecl output translator the mc100lvel92 is a triple pecl input to lvpecl output translator. the device receives standard pecl signals and translates them to differential lvpecl output signals. to accomplish the pecl to lvpecl level translation, the mc100lvel92 requires three power rails. the v cc supply is to be connected to the standard 5 v pecl supply, the lvcc supply is to be connected to the 3.3 v lvpecl supply, and ground is connected to the system ground plane. both the v cc and lvcc should be bypassed to ground with 0.01 m f capacitors. the pecl v bb pin, an internally generated voltage supply, is available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. ? 500 ps propagation delays ? 5 v and 3.3 v supplies required ? esd protection: >2 kv hbm, >200 v mm ? the 100 series contains temperature compensation ? lvpecl operating range: lv cc = 3.0 v to 3.8 v ? pecl operating range: v cc = 4.5 v to 5.5 v ? internal input pulldown resistors ? q output will default low with inputs open or < gnd+1.3 v ? meets or exceeds jedec spec eia/jesd78 ic latchup test ? moisture sensitivity level 1 for additional information, see application note and8003/d ? flammability rating: ul94 code v0 @ 1/8o, oxygen index 28 to 34 ? transistor count = 247 devices http://onsemi.com marking diagram* 1 20 a = assembly location wl = wafer lot yy = year ww = work week so20 dw suffix case 751d 100lvel92 awlyyww 1 20 device package shipping ordering information mc100lvel92dw so20 38 units/rail mc100lvel92dwr2 so20 1000 units/reel *for additional information, see application note and8002/d
mc100lvel92 http://onsemi.com 2 d2 d1 figure 1. logic diagram and pinout: 20-lead soic (top view) d1 17 18 16 15 14 13 12 4 3 5678 9 q0 11 10 q1 q1 q2 q2 v cc d0 19 20 2 1 v cc q0 d0 d2 v cc gnd lvcc lvcc pecl lvpecl pecl lvpecl pecl lvpecl pin description function pecl inputs lvpecl outputs pecl reference voltage output lvpecl power supply pecl power supply common ground rail pin dn, dn qn, qn pecl v bb lvcc v cc gnd warning: all v cc , lv cc , and gnd pins must be externally connected to power supply to guarantee proper operation. v bb pecl v bb pecl maximum ratings (note 1) symbol parameter condition 1 condition 2 rating units v cc pecl power supply gnd = 0 v 8 to 0 v lv cc lvpecl power supply gnd = 0 v 8 to 0 v v i pecl in p ut voltage gnd 0 v v i v cc 6to0 v v i pecl input voltage gnd = 0 v v i v cc 6 to 0 v i out output current continuous surge 50 100 ma ma i bb pecl v bb sink/source 0.5 ma ta operating temperature range 40 to +85 c t stg storage temperature range 65 to +150 c q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 20 soic 20 soic 90 60 c/w c/w q jc thermal resistance (junction to case) std bd 20 soic 30 to 35 c/w t sol wave solder <2 to 3 sec @ 248 c 265 c 1. maximum ratings are those values beyond which device damage may occur.
mc100lvel92 http://onsemi.com 3 pecl input dc characteristics v cc = 5.0 v; lv cc = 3.3 v; gnd= 0 v note 2) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit iv cc pecl power supply current 12 12 12 ma v ih input high voltage (single ended) 3835 4120 3835 4120 3835 4120 mv v il input low voltage (single ended) 3190 3515 3190 3525 3190 3525 mv pecl v bb output voltage reference 3.62 3.74 3.62 3.74 3.62 3.74 v v ihcmr input high voltage common mode range (differential) (note 3) vpp < 500 mv vpp 500 mv 1.3 1.5 4.8 4.8 1.2 1.4 4.8 4.8 1.2 1.4 4.8 4.8 v v i ih input high current 150 150 150 m a i il input low current d d 0.5 600 0.5 600 0.5 600 m a note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 2. input parameters vary 1:1 with v cc . v cc can vary 4.5 v to 5.5 v. 3. v ihcmr min varies 1:1 with gnd. v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies betwe en v pp min and 1 v. lvpecl output dc characteristics v cc = 5.0 v; lv cc = 3.3 v; gnd= 0 v (note 4) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit ilv cc lvpecl power supply current 20 20 21 ma v oh output high voltage (note 5) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mv v ol output low voltage (note 5) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mv note: devices are designed to meet the dc specifications shown in the above table, after thermal equilibrium has been establishe d. the circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 4. output parameters vary 1:1 with lv cc . v cc can vary 3.0 v to 3.8 v. 5. outputs are terminated through a 50 ohm resistor to gnd2 volts. ac characteristics v cc = 5.0 v; lv cc = 3.3 v; gnd= 0 v (note 6) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency tbd tbd tbd ghz t plh t phl propagation delay diff d to q s.e. 490 440 590 590 690 740 510 460 610 610 710 760 530 480 630 630 730 780 ps t skew skew outputtooutput (note 7) parttopart (diff) (note 7) duty cycle (diff) (note 8) 20 20 25 100 200 20 20 25 100 200 20 20 25 100 200 ps t jitter cycletocycle jitter tbd tbd tbd ps v pp input swing (note 9) 150 1000 150 1000 150 1000 mv t r t f output rise/fall times q (20% 80%) 320 580 320 580 320 580 ps 6. lv cc can vary 3.0 v to 3.8 v; v cc can vary 4.5 v to 5.5 v. 7. skews are valid across specified voltage range, parttopart skew is for a given temperature. 8. duty cycle skew is the difference between a tplh and tphl propagation delay through a device. 9. v pp (min) is the minimum input swing for which ac parameters are guaranteed. the device has a dc gain of 40.
mc100lvel92 http://onsemi.com 4 v tt = v cc 2.0 v figure 2. typical termination for output driver and device evaluation (see application note and8020 termination of ecl logic devices.) driver device receiver device q qb d db 50 50 v tt resource reference of application notes an1404 eclinps circuit performance at nonstandard v ih levels an1405 ecl clock distribution techniques an1406 designing with pecl (ecl at +5.0 v) an1503 eclinps i/o spice modeling kit an1504 metastability and the eclinps family an1560 low voltage eclinps spice modeling kit an1568 interfacing between lvds and ecl an1596 eclinps lite translator elt family spice i/o model kit an1650 using wireor ties in eclinps designs an1672 the ecl translator guide and8001 odd number counters design and8002 marking and date codes and8020 termination of ecl logic devices
mc100lvel92 http://onsemi.com 5 package dimensions so20 dw suffix plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc100lvel92 http://onsemi.com 6 notes
mc100lvel92 http://onsemi.com 7 notes
mc100lvel92 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc100lvel92/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada
mc100lvel92 http://onsemi.com 9 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc100lvel92/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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